Meet He Tingbo: Huawei’s ‘chip queen’ trying to rewrite China’s semiconductor playbook

AdvertisementHuaweiTechMeet He Tingbo: Huawei’s ‘chip queen’ trying to rewrite China’s semiconductor playbook

Presentation in Shanghai shows how company is trying to shift conversation from what it cannot buy to what it can still build

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Howard Liuin BeijingPublished: 4:00pm, 27 May 2026When He Tingbo took the stage in Shanghai this week to unveil Huawei Technologies’ Tau (τ) Scaling Law, the message was about more than a new chip development framework.

It was also a statement, showing how the most prominent Chinese technology company to have been subjected to US sanctions wants to compete in semiconductors when access to the world’s most advanced chipmaking tools remains restricted, and when the industry’s decades-old reliance on shrinking transistors is becoming more difficult.

For He, a Huawei veteran who heads the company’s semiconductor business, the idea was born from constraints. Speaking to reporters after the announcement, she recalled a period of frustration after US sanctions hit Huawei, saying there was a time when she felt there was “no way out”.Advertisement

But she said she later drew inspiration from Dujiangyan, the ancient irrigation system in Sichuan province built more than 2,000 years ago without electricity or modern machinery, and began to view sanctions not simply as restrictions, but as engineering constraints to be solved.

That mindset now sits at the centre of Huawei’s semiconductor narrative.

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He, who has been dubbed China’s “chip queen”, appeared at the IEEE International Symposium on Circuits and Systems in Shanghai on Monday to present the Tau (τ) Scaling Law, a framework Huawei says can guide chip development as Moore’s Law – which said the number of transistors on a microchip would double every two years or so – weakens.

Instead of relying only on geometric scaling – the process of shrinking transistors to pack more of them onto a chip – Huawei is proposing to improve performance by reducing delays across devices, circuits, chips and computing systems.

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